version 1.1.2.1, 2014/01/14 20:09:33
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version 1.1.2.12, 2014/02/18 14:11:20
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Line 24 hint.ehci.0.irq=1
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Line 24 hint.ehci.0.irq=1
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hint.pcib.0.at="nexus0" |
hint.pcib.0.at="nexus0" |
hint.pcib.0.irq=0 |
hint.pcib.0.irq=0 |
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## ath0 hint - pcie slot 0 | # ath0 hint - pcie slot 0 |
#hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000 | hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000 |
#hint.pcib.0.bus.0.0.0.ath_fixup_size=4096 | hint.pcib.0.bus.0.0.0.ath_fixup_size=4096 |
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## ath | # ath |
#hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" | hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" |
## Where the ART is | # Where the ART is |
#hint.ath.0.eepromaddr=0x1fff1000 | hint.ath.0.eepromaddr=0x1fff1000 |
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# arge0 MDIO bus | # mdiobus on arge0 |
hint.argemdio.0.at="nexus0" |
hint.argemdio.0.at="nexus0" |
hint.argemdio.0.maddr=0x19000000 |
hint.argemdio.0.maddr=0x19000000 |
hint.argemdio.0.msize=0x1000 |
hint.argemdio.0.msize=0x1000 |
hint.argemdio.0.order=0 |
hint.argemdio.0.order=0 |
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# arge0: MII; dedicated PHY 4 on switch, connected via internal switch | # |
# MDIO bus. | # AR7240 switch config |
| # |
## hint.arge.0.eeprommac=0x83fe9ff0 | |
#hint.arge.0.phymask=0x10 # PHY 4 | |
## hint.arge.0.miimode=2 # MII | |
#hint.arge.0.mdio=mdioproxy1 # Hanging off the arswitch MDIO bus | |
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## arge1: connected to the LAN switch MAC, at 1000BaseTX / GMII. | |
#hint.arge.1.phymask=0x0 | |
#hint.arge.1.mdio=mdioproxy1 # Hanging off the arswitch MDIO bus | |
## hint.arge.1.miimode=1 # GMII | |
##hint.arge.1.media=1000 # Force to 1000BaseTX/full | |
##hint.arge.1.fduplex=1 | |
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## | |
## AR7240 switch config | |
## | |
hint.arswitch.0.at="mdio0" |
hint.arswitch.0.at="mdio0" |
hint.arswitch.0.is_7240=1 # We need to be explicitly told this |
hint.arswitch.0.is_7240=1 # We need to be explicitly told this |
hint.arswitch.0.numphys=4 # 4 active switch PHYs (PHY 0 -> 3) |
hint.arswitch.0.numphys=4 # 4 active switch PHYs (PHY 0 -> 3) |
hint.arswitch.0.phy4cpu=1 # Yes, PHY 4 == dedicated PHY |
hint.arswitch.0.phy4cpu=1 # Yes, PHY 4 == dedicated PHY |
hint.arswitch.0.is_rgmii=1 # No, not RGMII | hint.arswitch.0.is_rgmii=0 # No, not RGMII |
hint.arswitch.0.is_gmii=0 # No, not GMII | hint.arswitch.0.is_gmii=1 # No, not GMII |
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# arge0 | # arge0: MII; dedicated PHY 4 on switch, connected via internal switch |
| # MDIO bus. |
hint.arge.0.at="nexus0" |
hint.arge.0.at="nexus0" |
hint.arge.0.maddr=0x19000000 |
hint.arge.0.maddr=0x19000000 |
hint.arge.0.msize=0x1000 |
hint.arge.0.msize=0x1000 |
hint.arge.0.irq=2 |
hint.arge.0.irq=2 |
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hint.arge.0.eeprommac=0x1fff0000 |
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hint.arge.0.phymask=0x10 # PHY 4 |
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# hint.arge.0.miimode=2 # MII |
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hint.arge.0.mdio=mdioproxy1 # Hanging off the arswitch MDIO bus |
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# AR8316 workaround for now | # arge1: connected to the LAN switch MAC, at 1000BaseTX / GMII. |
hint.arge.0.media=1000 | |
hint.arge.0.fduplex=1 | |
hint.arge.0.phymask=0x3 | |
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hint.arge.1.at="nexus0" |
hint.arge.1.at="nexus0" |
hint.arge.1.maddr=0x1a000000 |
hint.arge.1.maddr=0x1a000000 |
hint.arge.1.msize=0x1000 |
hint.arge.1.msize=0x1000 |
hint.arge.1.irq=3 |
hint.arge.1.irq=3 |
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hint.arge.1.eeprommac=0x1fff0006 |
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hint.arge.1.phymask=0x0 |
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#hint.arge.1.mdio=mdioproxy1 # Hanging off the arswitch MDIO bus |
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# hint.arge.1.miimode=1 # GMII |
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hint.arge.1.media=1000 # Force to 1000BaseTX/full |
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hint.arge.1.fduplex=1 |
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# GPIO |
# GPIO |
hint.gpio.0.at="apb0" |
hint.gpio.0.at="apb0" |
hint.gpio.0.maddr=0x18040000 |
hint.gpio.0.maddr=0x18040000 |
hint.gpio.0.msize=0x1000 |
hint.gpio.0.msize=0x1000 |
hint.gpio.0.irq=2 |
hint.gpio.0.irq=2 |
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hint.gpio.0.pinmask=0x1319c3 |
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hint.gpio.0.function_set=0x00000000 |
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hint.gpio.0.function_clear=0x00000000 |
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# Signal leds |
# Signal leds |
hint.gpioled.0.at="gpiobus0" |
hint.gpioled.0.at="gpiobus0" |
hint.gpioled.0.name="but0" | hint.gpioled.0.name="but_0" |
hint.gpioled.0.pins=0x00800 # pin 11 |
hint.gpioled.0.pins=0x00800 # pin 11 |
hint.gpioled.1.at="gpiobus0" |
hint.gpioled.1.at="gpiobus0" |
hint.gpioled.1.name="sig2" | hint.gpioled.1.name="led_0" |
hint.gpioled.1.pins=0x20000 # pin 17 | hint.gpioled.1.pins=0x0001 # pin 0 |
hint.gpioled.2.at="gpiobus0" |
hint.gpioled.2.at="gpiobus0" |
hint.gpioled.2.name="sig3" | hint.gpioled.2.name="led_1" |
hint.gpioled.2.pins=0x10000 # pin 16 | hint.gpioled.2.pins=0x0002 # pin 1 |
| hint.gpioled.3.at="gpiobus0" |
| hint.gpioled.3.name="led_2" |
| hint.gpioled.3.pins=0x20000 # pin 17 ? |
hint.gpioled.4.at="gpiobus0" |
hint.gpioled.4.at="gpiobus0" |
hint.gpioled.4.name="sig5" | hint.gpioled.4.name="led_3" |
hint.gpioled.4.pins=0x01000 # pin 12 | hint.gpioled.4.pins=0x10000 # pin 16 ? |
hint.gpioled.5.at="gpiobus0" |
hint.gpioled.5.at="gpiobus0" |
hint.gpioled.5.name="sig6" | hint.gpioled.5.name="led_5" |
hint.gpioled.5.pins=0x00100 # pin 8 | hint.gpioled.5.pins=0x01000 # pin 12 |
hint.gpioled.6.at="gpiobus0" |
hint.gpioled.6.at="gpiobus0" |
hint.gpioled.6.name="sig7" | hint.gpioled.6.name="led_6" |
hint.gpioled.6.pins=0x00040 # pin 6 | hint.gpioled.6.pins=0x00100 # pin 8 ? |
hint.gpioled.7.at="gpiobus0" |
hint.gpioled.7.at="gpiobus0" |
hint.gpioled.7.name="sig8" | hint.gpioled.7.name="led_7" |
hint.gpioled.7.pins=0x00080 # pin 7 | hint.gpioled.7.pins=0x00040 # pin 6 ? |
| hint.gpioled.8.at="gpiobus0" |
| hint.gpioled.8.name="led_8" |
| hint.gpioled.8.pins=0x00080 # pin 7 ? |
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# SPI controller/bus |
# SPI controller/bus |
hint.spi.0.at="nexus0" |
hint.spi.0.at="nexus0" |
hint.spi.0.maddr=0x1f000000 |
hint.spi.0.maddr=0x1f000000 |
Line 153 hint.map.1.readonly=0
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Line 156 hint.map.1.readonly=0
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hint.map.2.at="flash/spi0" |
hint.map.2.at="flash/spi0" |
hint.map.2.start=0x00050000 |
hint.map.2.start=0x00050000 |
hint.map.2.end=0x00300000 # 2752k rootfs | #hint.map.2.end=0x00300000 # 2752k rootfs |
#hint.map.2.end=0x00650000 # 6144k rootfs | hint.map.2.end=0x00650000 # 6144k rootfs |
hint.map.2.name="rootfs" |
hint.map.2.name="rootfs" |
hint.map.2.readonly=1 |
hint.map.2.readonly=1 |
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hint.map.3.at="flash/spi0" |
hint.map.3.at="flash/spi0" |
hint.map.3.start=0x00300000 | #hint.map.3.start=0x00300000 |
hint.map.3.end=0x003e0000 # 896k uImage | #hint.map.3.end=0x003e0000 # 896k uImage |
#hint.map.3.start=0x00650000 | hint.map.3.start=0x00650000 |
#hint.map.3.end=0x007e0000 # 1600k uImage | hint.map.3.end=0x007e0000 # 1600k uImage |
hint.map.3.name="uImage" |
hint.map.3.name="uImage" |
hint.map.3.readonly=0 | hint.map.3.readonly=1 |
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hint.map.4.at="flash/spi0" |
hint.map.4.at="flash/spi0" |
hint.map.4.start=0x003e0000 | #hint.map.4.start=0x003e0000 |
hint.map.4.end=0x003f0000 # 64k NVRAM | #hint.map.4.end=0x003f0000 # 64k cfg |
#hint.map.4.start=0x007e0000 | hint.map.4.start=0x007e0000 |
#hint.map.4.end=0x007f0000 # 64k NVRAM | hint.map.4.end=0x007f0000 # 64k cfg |
hint.map.4.name="NVRAM" | hint.map.4.name="cfg" |
hint.map.4.readonly=0 |
hint.map.4.readonly=0 |
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hint.map.5.at="flash/spi0" |
hint.map.5.at="flash/spi0" |
hint.map.5.start=0x003f0000 | #hint.map.5.start=0x003f0000 |
hint.map.5.end=0x00400000 # 64k ART | #hint.map.5.end=0x00400000 # 64k ART |
#hint.map.5.start=0x007f0000 | hint.map.5.start=0x007f0000 |
#hint.map.5.end=0x00800000 # 64k ART | hint.map.5.end=0x00800000 # 64k ART |
hint.map.5.name="ART" |
hint.map.5.name="ART" |
hint.map.5.readonly=1 |
hint.map.5.readonly=1 |
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Line 186 hint.map.6.at="flash/spi0"
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Line 189 hint.map.6.at="flash/spi0"
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hint.map.6.start=0x00050000 |
hint.map.6.start=0x00050000 |
hint.map.6.end=0x007e0000 # 7744k firmware |
hint.map.6.end=0x007e0000 # 7744k firmware |
hint.map.6.name="firmware" |
hint.map.6.name="firmware" |
hint.map.6.readonly=1 | hint.map.6.readonly=0 |