Annotation of embedaddon/ntp/kernel/sys/tt560_api.h, revision 1.1.1.1
1.1 misho 1: /***********************************************************************
2: *
3: * Module: ttime_api.h
4: *
5: * Author: SIS 1998
6: * LM NE&SS 2001
7: *
8: * Description
9: *
10: * This header file contains data necessary for the API to the
11: * True Time board. This contains all of the structure definitions
12: * for the individual registers.
13: *
14: ***********************************************************************/
15: #ifndef TTIME_API_H
16: #define TTIME_API_H
17:
18: #ifdef CPP
19: extern "C" {
20: #endif
21:
22: #include <time.h>
23:
24: typedef struct
25: {
26: unsigned int micro_sec;
27: unsigned int milli_sec;
28: struct tm gps_tm;
29: } gps_time_t;
30:
31: typedef struct
32: {
33: unsigned char reserved_1;
34: unsigned unit_ms : 4;
35: unsigned filler_0 : 4;
36: unsigned hun_ms : 4;
37: unsigned tens_ms : 4;
38: unsigned tens_sec : 4;
39: unsigned unit_sec : 4;
40:
41: unsigned tens_min : 4;
42: unsigned unit_min : 4;
43: unsigned tens_hour : 4;
44: unsigned unit_hour : 4;
45: unsigned tens_day : 4;
46: unsigned unit_day : 4;
47: unsigned filler_1 : 4;
48: unsigned hun_day : 4;
49:
50: unsigned tens_year : 4;
51: unsigned unit_year : 4;
52: unsigned thou_year : 4;
53: unsigned hun_year : 4;
54: unsigned char reserved_2[2];
55: } preset_time_reg_t;
56:
57: typedef struct
58: {
59: unsigned n_d0 : 2;
60: unsigned antenna_short_stat : 1; /* 0 = fault */
61: unsigned antenna_open_stat : 1; /* 0 = fault */
62: unsigned n_d1 : 1;
63: unsigned rate_gen_pulse_stat : 1;
64: unsigned time_cmp_pulse_stat : 1;
65: unsigned ext_event_stat : 1;
66:
67: } hw_stat_reg_t;
68:
69: typedef struct
70: {
71: unsigned tens_us : 4;
72: unsigned unit_us : 4;
73: unsigned unit_ms : 4;
74: unsigned hun_us : 4;
75: unsigned char hw_stat; /* hw_stat_reg_t hw_stat; */
76: unsigned char reserved_3;
77:
78: unsigned hun_ms : 4;
79: unsigned tens_ms : 4;
80: unsigned tens_sec : 4;
81: unsigned unit_sec : 4;
82: unsigned tens_min : 4;
83: unsigned unit_min : 4;
84: unsigned tens_hour : 4;
85: unsigned unit_hour : 4;
86:
87: unsigned tens_day : 4;
88: unsigned unit_day : 4;
89: unsigned status : 4;
90: unsigned hun_day : 4;
91: unsigned tens_year : 4;
92: unsigned unit_year : 4;
93: unsigned thou_year : 4;
94: unsigned hun_year : 4;
95: } time_freeze_reg_t;
96:
97: typedef struct
98: {
99: unsigned char off_low;
100: unsigned char off_high;
101: unsigned char reserved_4[2];
102: } sync_gen_off_reg_t;
103:
104: typedef struct
105: {
106: unsigned tens_min : 4;
107: unsigned unit_min : 4;
108: unsigned tens_hour : 4;
109: unsigned unit_hour : 4;
110: unsigned char sign_ascii; /* '+' or '-' */
111: unsigned char reserved_5;
112: } local_off_t;
113:
114: /*
115: * This structure can be used for both the position freeze
116: * and position preset registers.
117: */
118: typedef struct
119: {
120: unsigned lat_tens_degee : 4;
121: unsigned lat_unit_degee : 4;
122: unsigned filler_0 : 4;
123: unsigned lat_hun_degree : 4;
124: unsigned lat_tens_min : 4;
125: unsigned lat_unit_min : 4;
126: unsigned char lat_north_south; /* 'N' or 'S' */
127:
128: unsigned filler_1 : 4;
129: unsigned lat_tenth_sec : 4;
130: unsigned lat_tens_sec : 4;
131: unsigned lat_unit_sec : 4;
132: unsigned long_tens_degree : 4;
133: unsigned long_unit_degree : 4;
134: unsigned filler_2 : 4;
135: unsigned long_hun_degree : 4;
136:
137: unsigned long_tens_min : 4;
138: unsigned long_unit_min : 4;
139: unsigned char long_east_west; /* 'E' or 'W' */
140: unsigned filler_3 : 4;
141: unsigned long_tenth_sec : 4;
142: unsigned long_tens_sec : 4;
143: unsigned long_unit_sec : 4;
144:
145: unsigned elv_tens_km : 4;
146: unsigned elv_unit_km : 4;
147: unsigned char elv_sign; /* '+' or '-' */
148: unsigned elv_unit_m : 4;
149: unsigned elv_tenth_m : 4;
150: unsigned elv_hun_m : 4;
151: unsigned elv_tens_m : 4;
152: } pos_reg_t;
153:
154: typedef struct
155: {
156: unsigned char prn1_tens_units;
157: unsigned char prn1_reserved;
158: unsigned char lvl1_tenths_hundredths;
159: unsigned char lvl1_tens_units;
160:
161: unsigned char prn2_tens_units;
162: unsigned char prn2_reserved;
163: unsigned char lvl2_tenths_hundredths;
164: unsigned char lvl2_tens_units;
165:
166: unsigned char prn3_tens_units;
167: unsigned char prn3_reserved;
168: unsigned char lvl3_tenths_hundredths;
169: unsigned char lvl3_tens_units;
170:
171: unsigned char prn4_tens_units;
172: unsigned char prn4_reserved;
173: unsigned char lvl4_tenths_hundredths;
174: unsigned char lvl4_tens_units;
175:
176: unsigned char prn5_tens_units;
177: unsigned char prn5_reserved;
178: unsigned char lvl5_tenths_hundredths;
179: unsigned char lvl5_tens_units;
180:
181: unsigned char prn6_tens_units;
182: unsigned char prn6_reserved;
183: unsigned char lvl6_tenths_hundredths;
184: unsigned char lvl6_tens_units;
185:
186: unsigned char flag;
187: unsigned char reserved[3];
188: } sig_levels_t;
189:
190: typedef struct
191: {
192: unsigned tens_us : 4;
193: unsigned unit_us : 4;
194: unsigned unit_ms : 4;
195: unsigned hun_us : 4;
196: unsigned hun_ms : 4;
197: unsigned tens_ms : 4;
198: unsigned tens_sec : 4;
199: unsigned unit_sec : 4;
200:
201: unsigned tens_min : 4;
202: unsigned unit_min : 4;
203: unsigned tens_hour : 4;
204: unsigned unit_hour : 4;
205: unsigned tens_day : 4;
206: unsigned unit_day : 4;
207: unsigned stat : 4;
208: unsigned hun_day : 4;
209:
210: unsigned tens_year : 4;
211: unsigned unit_year : 4;
212: unsigned thou_year : 4;
213: unsigned hun_year : 4;
214: unsigned char reserved_5[2];
215: } ext_time_event_reg_t;
216:
217: typedef struct
218: {
219: unsigned tens_us : 4;
220: unsigned unit_us : 4;
221: unsigned unit_ms : 4;
222: unsigned hun_us : 4;
223: unsigned hun_ms : 4;
224: unsigned tens_ms : 4;
225: unsigned tens_sec : 4;
226: unsigned unit_sec : 4;
227:
228: unsigned tens_min : 4;
229: unsigned unit_min : 4;
230: unsigned tens_hour : 4;
231: unsigned unit_hour : 4;
232: unsigned tens_day : 4;
233: unsigned unit_day : 4;
234: unsigned mask : 4;
235: unsigned hun_day : 4;
236: } time_cmp_reg_t;
237:
238: typedef struct
239: {
240: unsigned char err_stat;
241: unsigned char no_def;
242: unsigned char oscillator_stat[2];
243: } diag_reg_t;
244:
245: typedef struct
246: {
247: unsigned res :2;
248: unsigned rate_int_mask :1;
249: unsigned cmp_int_mask :1;
250: unsigned ext_int_mask :1;
251: unsigned rate_stat_clr :1;
252: unsigned cmp_stat_clr :1;
253: unsigned ext_stat_clr :1;
254: unsigned char reserved[3];
255: } hw_ctl_reg_t;
256:
257: typedef struct
258: {
259: unsigned preset_pos_rdy :1;
260: unsigned sel_pps_ref :1;
261: unsigned sel_gps_ref :1;
262: unsigned sel_time_code :1;
263: unsigned gen_stp_run :1;
264: unsigned preset_time_rdy :1;
265: unsigned dst :1;
266: unsigned mode_sel :1;
267:
268: unsigned ctl_am_dc :1;
269: unsigned reserved :3;
270: unsigned input_code :4;
271:
272: unsigned char rate_reserved;
273:
274: unsigned rate_flag :4;
275: unsigned rate_reserved1 :4;
276: } conf_reg_t;
277:
278: typedef struct
279: {
280: unsigned char mem_reserved[0xf8];
281:
282: hw_ctl_reg_t hw_ctl_reg;
283:
284: time_freeze_reg_t time_freeze_reg;
285:
286: pos_reg_t pos_freeze_reg;
287:
288: conf_reg_t conf_reg;
289:
290: diag_reg_t diag_reg;
291:
292: local_off_t local_offset;
293:
294: sync_gen_off_reg_t sync_gen_offset;
295:
296: unsigned char reserved[4];
297:
298: unsigned char config_reg2_ctl;
299:
300: unsigned char reserved2[11];
301:
302: time_cmp_reg_t time_compare_reg;
303:
304: unsigned char reserved3[24];
305:
306: preset_time_reg_t preset_time_reg;
307:
308: pos_reg_t preset_pos_reg;
309:
310: ext_time_event_reg_t extern_time_event_reg;
311:
312: unsigned char reserved4[24];
313:
314: sig_levels_t signal_levels_reg;
315:
316: unsigned char reserved5[12];
317: } tt_mem_space_t;
318:
319: #define TTIME_MEMORY_SIZE 0x200
320:
321: /*
322: * Defines for register offsets
323: */
324: #define HW_CTL_REG 0x0f8
325: #define TIME_FREEZE_REG 0x0fc
326: #define HW_STAT_REG 0x0fe
327: #define POS_FREEZE_REG 0x108
328: #define CONFIG_REG_1 0x118
329: #define DIAG_REG 0x11c
330: #define LOCAL_OFF_REG 0x120
331: #define SYNC_GEN_OFF_REG 0x124
332: #define CONFIG_REG_2 0x12c
333: #define TIME_CMP_REG 0x138
334: #define PRESET_TIME_REG 0x158
335: #define PRESET_POS_REG 0x164
336: #define EXT_EVENT_REG 0x174
337: #define SIG_LVL_PRN1 0x198
338: #define SIG_LVL_PRN2 0x19c
339: #define SIG_LVL_PRN3 0x1a0
340: #define SIG_LVL_PRN4 0x1a4
341: #define SIG_LVL_PRN5 0x1a8
342: #define SIG_LVL_PRN6 0x1ac
343: #define SIG_LVL_FLAG 0x1b0
344:
345: /*
346: * Defines for accessing the hardware status register.
347: */
348: #define HW_STAT_ANTENNA_SHORT 0 /* access the antenna short bit */
349: #define HW_STAT_ANTENNA_OPEN 1 /* access the antenna open bit */
350: #define HW_STAT_RATE_GEN_PULSE_STAT 2 /* access the rate gen pulse bit */
351: #define HW_STAT_TIME_CMP_PULSE_STAT 3 /* access the time cmp bit */
352: #define HW_STAT_EXT_EVENT_STAT 4 /* access the external event bit */
353:
354: /*
355: * Defines for accessing the hardware control register
356: */
357:
358: #define HW_CTL_RATE_INT_MASK 0 /* access rate generator int mask */
359: #define HW_CTL_CMP_INT_MASK 1 /* access compare interrupt mask */
360: #define HW_CTL_EXT_INT_MASK 2 /* access external event interrupt mask */
361: #define HW_CTL_RATE_GEN_INT_CLEAR 3 /* access rate gen. interrupt clear field */
362: #define HW_CTL_TIME_CMP_INT_CLEAR 4 /* access time cmp interrupt clear field */
363: #define HW_CTL_EXT_EVENT_INT_CLEAR 5 /* access external event int clear field */
364:
365: /*
366: * Defines for configuration register bit fields.
367: */
368: #define PRESET_POS_RDY_BIT 0 /* access the preset pos. rdy. bit */
369: #define SEL_1_PPS_REF_BIT 1 /* access the select 1 pps reference bit */
370: #define SEL_GPS_REF_BIT 2 /* access the select gps reference bit */
371: #define SEL_TIME_CODE_REF_BIT 3 /* access the select time code reference bit */
372: #define GEN_STOP_BIT 4 /* access the generator start/stop bit */
373: #define PRESET_TIME_RDY_BIT 5 /* access the preset time ready bit */
374: #define DST_BIT 6 /* access the DST bit */
375: #define MODE_SEL_BIT 7 /* access the mode select bit */
376: #define AM_DC_BIT 8 /* access the code bits AM/DC bit */
377: #define IN_CODE_SEL_BIT 9 /* access the input code select bit */
378: #define FLAG_BIT 10 /* access the flag bit */
379:
380: /*
381: * The following defines are used to set modes in the
382: * configuration register.
383: */
384:
385: #define CONF_SET_AM 0 /* Set code to AM */
386: #define CONF_SET_DC 1 /* Set code to DC */
387: #define CONF_SET_IRIG_B 0 /* Set code IRIG B */
388: #define CONF_SET_IRIG_A 1 /* Set code IRIG A */
389:
390: #define CONF_FLAG_DISABLE 0 /* Disable pulse */
391: #define CONF_FLAG_10K_PPS 1 /* Set rate to 10k PPS */
392: #define CONF_FLAG_1K_PPS 2 /* Set rate to 1k PPS */
393: #define CONF_FLAG_100_PPS 3 /* Set rate to 100 PPS */
394: #define CONF_FLAG_10_PPS 4 /* Set rate to 10 PPS */
395: #define CONF_FLAG_1_PPS 5 /* Set rate to 1 PPS */
396:
397: /*
398: * Defines for read commands
399: */
400:
401: #define TT_RD_FREEZE_REG 0x01
402: #define TT_RD_HW_CTL_REG 0x02
403: #define TT_RD_CNFG_REG 0x03
404: #define TT_RD_DIAG_REG 0x04
405: #define TT_RD_LCL_OFFSET 0x05
406: #define TT_RD_SYNC_GEN_OFF 0x06
407: #define TT_RD_CNFG_REG_2 0x07
408: #define TT_RD_TIME_CMP_REG 0x08
409: #define TT_RD_PRESET_REG 0x09
410: #define TT_RD_EXT_EVNT_REG 0x0a
411: #define TT_RD_SIG_LVL_REG 0x0b
412:
413: /*
414: * Defines for write commands
415: */
416: #define TT_WRT_FREEZE_REG 0x0c
417: #define TT_WRT_HW_CTL_REG 0x0d
418: #define TT_WRT_CNFG_REG 0x0e
419: #define TT_WRT_DIAG_REG 0x0f
420: #define TT_WRT_LCL_OFFSET 0x10
421: #define TT_WRT_SYNC_GEN_OFF 0x11
422: #define TT_WRT_CNFG_REG_2 0x12
423: #define TT_WRT_TIME_CMP_REG 0x13
424: #define TT_WRT_PRESET_REG 0x14
425: #define TT_WRT_EXT_EVNT_REG 0x15
426: #define TT_WRT_SIG_LVL_REG 0x16
427:
428: /*
429: * Define the length of the buffers to move (in 32 bit words).
430: */
431:
432: #define HW_CTL_REG_LEN 1
433: #define CNFG_REG_1_LEN 1
434: #define DIAG_REG_LEN 1
435: #define LCL_OFFSET_LEN 1
436: #define SYNC_GEN_OFF_LEN 1
437: #define CNFG_REG_2_LEN 1
438:
439: #define TIME_CMP_REG_LEN 2
440: #define PRESET_TIME_REG_LEN 3
441: #define PRESET_POS_REG_LEN 4
442: #define PRESET_REG_LEN (PRESET_TIME_REG_LEN+PRESET_POS_REG_LEN)
443: #define TIME_FREEZE_REG_LEN 3
444: #define POSN_FREEZE_REG_LEN 4
445: #define FREEZE_REG_LEN (TIME_FREEZE_REG_LEN+POSN_FREEZE_REG_LEN)
446: #define EXT_EVNT_REG_LEN 3
447: #define SIG_LVL_REG_LEN 7
448: #define GPS_TIME_LEN 7
449:
450: /*
451: * Define BCD - INT - BCD macros.
452: */
453:
454: #define BCDTOI(a) ( ( ( ( (a) & 0xf0 ) >> 4 ) * 10 ) + ( (a) & 0x0f ) )
455: #define ITOBCD(a) ( ( ( ( (a) ) / 10) << 4 ) + ( ( (a) ) % 10) )
456: #define LTOBCD(a) ( ( ( ( (uint64_t)(a) ) / 10) << 4 ) + ( ( (uint64_t)(a) ) % 10) )
457:
458: extern int init_560 ( );
459: extern void close_560 ( );
460: extern int write_hw_ctl_reg (hw_ctl_reg_t *);
461: extern int write_hw_ctl_reg_bitfield (int, int );
462: extern int read_conf_reg (conf_reg_t *);
463: extern int read_conf_reg_bitfield (int );
464: extern int write_conf_reg (conf_reg_t *);
465: extern int write_conf_reg_bitfield (int, unsigned char );
466: extern int read_hw_stat_reg_bitfield (int );
467: extern int read_local_offset_reg (local_off_t *);
468: extern int write_local_offset_reg (local_off_t *);
469: extern int read_sync_offset_reg (sync_gen_off_reg_t *);
470: extern int write_sync_offset_reg (sync_gen_off_reg_t *);
471: extern int read_time_cmp_reg (time_cmp_reg_t *);
472: extern int write_time_cmp_reg (time_cmp_reg_t *);
473: extern int read_preset_time_reg (preset_time_reg_t *);
474: extern int write_preset_time_reg (preset_time_reg_t *);
475: extern int reset_time ( );
476: extern int set_new_time (preset_time_reg_t *);
477: extern int read_preset_position_reg (pos_reg_t *);
478: extern int write_preset_position_reg (pos_reg_t *);
479: extern int read_external_event_reg (ext_time_event_reg_t *);
480: extern int read_signal_level_reg (sig_levels_t *);
481: extern int freeze_time ( );
482: extern int snapshot_time (time_freeze_reg_t *);
483: extern int read_position_freeze_reg (pos_reg_t *);
484: extern int read_diag_reg (diag_reg_t *);
485:
486: #ifdef CPP
487: }
488: #endif
489: #endif
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